Bustronic has been developing the GigaBridge High Availability backplane along with PLX Technology Inc. utilizing their switched-PCI technology. The backplane will operate at much higher data rates than standard PCI technology. In addition to operating at increased speed over a standard PCI bus, a switched-PCI network is able to support multiple concurrent transactions, increasing the performance versus a shared-bus. Performance is further increased by the elimination of the PCI-to-PCI bridges in the system, thereby reducing the transaction latency.The Bustronic development backplane is designed for prototyping and eases the transition to a full GigaBridge system. Any standard CompactPCI board can be used in the Bustronic development backplane to test the GigaBridge architecture. A developer can plug his CompactPCI boards into the development system chassis and run hardware and software to prove the GigaBridge concept. Once the developer has completed the proof of concept phase, the GigaBridge GBP ICs can be designed into the boards and a backplane designed for the application.

The GigaBridge High Availability Backplane from Bustronic will implement PLX's GigaBridge technology to offer a scalable, highly available, self-healing topology using a 6.4 Gbps Low Voltage Differential Signaling (LVDS) link interface. This development system consists of the chassis, GigaBridge High Availability backplane, GigaBridge-enabled card and a Switch module. The GigaBridge-enabled card converts the PCI bus to the GigaBridge ring via a bridge chip. A cell-based network with independent PCI bus segments connected to each port, each controller can drive up to four PCI slots and interoperates with other controllers as ports on the network. Each controller is linked via two 16-bit-wide, point-to-point, low-voltage-differential links clocked at 400MHz. The developer's CompactPCI board plugs into the GigaBridge-enabled card. In turn, the GigaBridge-enabled card plugs into the backplane. The GigaBridge ring is contained on the backplane.

The backplane features a 6U height and a twelve-slot controlled impedance design. It is not necessary to populate the entire backplane, as every slot has a switch module plugged in the rear. When the slot is left empty, the switch module completes the switched-PCI network. The switch module detects when a GigaBridge-enabed board is present and shuts off, allowing the bridge to handle network traffic. The network can tolerate a maximum of 8 empty slots on the backplane.

The development backplane will be available in the July/Aug. 2002 timeframe. For more information, please contact Bustronic at 510-490-7388.

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